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harris-corner-asic
harris-corner-asic PublicStreaming Harris corner detector ASIC in SystemVerilog, RTL to GDSII with Cadence Genus/Conformal/Tempus/Innovus (90 nm, 250 MHz)
Verilog
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tmr-uart-seu
tmr-uart-seu PublicBECE303L: SEU-tolerant UART transmitter with voted-feedback TMR - fault injection, RTL to routed layout in Cadence GPDK090 (90 nm)
Verilog
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cache-hierarchy-ncg
cache-hierarchy-ncg PublicBEVD207L: gem5 cache hierarchy study (L1/L2/L3 size and associativity) with the Normalized Cache Gain metric and Pareto-optimal design
Python
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v2v-communication
v2v-communication PublicESP32 vehicle-to-vehicle hazard alerts: sensor nodes, roadside-unit gateway, React live console, and a MATLAB APF collision-avoidance study (VIT hackathon Top 10)
JavaScript
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