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Fix solver memory/accuracy and closed-form model errors - #52

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fix/solver-accuracy-and-memory
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fix/solver-accuracy-and-memory

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Summary

  • solve_full: a sparse graded-mesh solver with a cell budget replaces runs that took >10 min or raised MemoryError. Typical PCB cross-sections now solve in under a second, within a few percent of reference field solutions.
  • Rasterizers: keep FR-4 Er 4.2 instead of snapping to PVC (Er 4.5). The cache key now includes materials.
  • Coupled microstrip: Kirschning-Jansen even/odd modes, with an optional solder mask. Odd-mode eps_eff is now below even-mode.
  • Stripline: Wheeler models, with validity_warnings and stated accuracy.
  • CPWG: never above microstrip, and monotonic in gap.
  • Conductor loss: Pucel with Rs and optional roughness. It had been about 20x low.
  • Dielectric loss: uses filling factors, so embedded and bare microstrip are consistent.
  • Microstrip eps_eff: the thickness-correction sign is fixed.

Testing

  • Full suite: 764 passed, 12 skipped (ATLC3_NO_CACHE=1 uv run --extra dev --extra gui pytest).
  • New regression tests carry before/after numbers checked against field solves.

🤖 Generated with Claude Code

- solve_full: sparse graded-mesh solver with a cell budget that
  auto-coarsens or raises MeshBudgetExceeded; PEEC assembly guarded.
  Typical PCB cross-sections solve in under a second within a few
  percent of reference values.
- Rasterizers kept FR-4 Er instead of snapping to the nearest palette
  material; cache key includes materials.
- Coupled microstrip: Kirschning-Jansen even/odd modes, optional solder
  mask; odd-mode eps_eff now below even-mode.
- Stripline: Wheeler models with validity warnings and stated accuracy.
- CPWG: never above microstrip, monotonic in gap.
- Conductor loss: Pucel with surface resistance and optional roughness;
  dielectric loss by filling factor (embedded vs bare consistent).
- Microstrip eps_eff thickness correction sign fixed.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

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